Session 18 - Wireline Transceivers and Building Blocks
1.
S: 18-1 A 3.125-to-28.125 Gb/s Multi-Standard Transceiver with a Fully Channel-independent Operation in 40nm CMOS
(Author: J. H. Yoon, K. Kwon, H. M. Bae, KAIST)

 5 (best) 
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2.
S: 18-2 A 25Gb/s APD-Based Burst-Mode Optical Receiver with 2.24ns Reconfiguration Time in 28nm CMOS
(Authors: K.-C. Chen, A. Emami, California Institute of Technology)

 5 (best) 
Presentation Quality
Technical Quality
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3.
S: 18-3 A 32-mW 40-Gb/s CMOS NRZ Transmitter
(Authors: Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi, University of California, Los Angeles)

 5 (best) 
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4.
S: 18-4 A 56 Gb/s 6 mW 300 µm2 inverter-based CTLE for short-reach PAM2 applications in 16 nm CMOS
(Authors: Kevin Zheng*, Yohan Frans**, Ken Chang**, Boris Murmann*, *Stanford University, **Xilinx Inc.)

 5 (best) 
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5.
S: 18-5 LEIA: Ground-Referenced Signaling for Intra-Chip and Short-Reach Chip-to-Chip Interconnects (Invited), (Outstanding Invited Paper Nominee)
(Authors: Walker J. Turner, John W. Poulton, John M. Wilson, Xi Chen, Stephen G. Tell, Matthew Fojtik, Thomas H. Greer III, Brian Zimmer, Sanquan Song, Nikola Nedovic, Sudhir S. Kudva, Sunil R. Sudhakaran, Rizwan Bashirullah*, Wenxu Zhao**, William J. Dally, C. Thomas Gray, NVIDIA, *University of Florida, **Broadcom )

 5 (best) 
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6.
S: 18-6 A 15Gb/s 1.9pJ/bit Sub-baud-rate Digital CDR, (Outstanding Student Paper Nominee)
(Authors: D. Kim, W. Choi, A. Elkholy, J. Kenney*, P. Hanumolu, University of Illinois at Urbana-Champaign, *Analog Devices Inc.)

 5 (best) 
Presentation Quality
Technical Quality
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